Xilinx is the world’s leading provider of All Programmable FPGAs, SoCs and 3D ICs. These industry-leading devices are coupled with a next-generation design environment and IP to serve a broad range of customer needs, from programmable logic to programmable systems integration.
Post Name: Junior ESL-Simulation Research Engineer
Education:
BE/ BTECH from a recognized University.
Work Experience: 0-2 years
Required Skills:
- Strong in C++ & System C
- Above average in VHDL or Verilog
- Experience of TLM and AXI bus protocols
- Mixed language simulation
Desirable: Preference will be given to those having experience in any of the following-
- Design patterns
- Xilinx ISE or Vivado tools
- Experience in IP Design environment in standards based environment involving IP X-ACT, TCL based architecture
Job Code: IRC96608
Work Place: Across India